DESIGN AND FUNCTIONAL ANALYSIS OF THE ADVANCED ENCRYPTION STANDARD (AES) ALGORITHM ON FPGA

Abstract

Internet of things (IoT), internetworking of smart devices, embedded with sensors, software, electronics and network connectivity that enables to communicate with each other to exchange and collect data through an uncertain wireless medium. Recently IoT devices are dominating the world by providing it's versatile functionality and real-time data communication. Apart from versatile functionality of IoT devices, they are very low battery powered, small and sophisticated, and experience lots of challenges due to unsafe communication medium. Despite the fact of many challenges, the energy issue is now becoming the prime concern. Optimization of algorithms in terms of energy consumption has not been explored specifically, rather most of the algorithms focus on hardware area to minimize it extensively and to maximize it on security issue as possible. But due to recent emerge of IoT devices, the main concern is shifting to moderate security and less energy consumption rate. We present AES Algorithm is working with one key, to improving the security of the design here we are adding one module for supplying key randomly, for applying random key we are taking random number generator module in this project.