DESIGN OF A NANOSCALE CMOS 12-TRANSISTOR MEMORY CELL FOR RELIABLE AEROSPACE SYSTEMS

Abstract

The rapid advancement of aerospace electronics and space communication systems has created a strong demand for high-performance memory architectures that provide low power consumption, high stability, radiation tolerance, and reliable operation under extreme environmental conditions. Conventional memory cells used in nanoscale CMOS technology often suffer from challenges such as leakage current, soft errors, process variations, and reduced stability when exposed to harsh aerospace environments including cosmic radiation, temperature fluctuations, and electromagnetic interference. To overcome these limitations, the proposed 12T Memory Cell for Aerospace Applications in Nano Scale CMOS Technology introduces an optimized transistor-based memory architecture capable of achieving enhanced reliability, improved noise margins, and low-power operation suitable for aerospace and satellite systems. The 12-transistor memory cell design improves read and write stability while minimizing leakage power and increasing resistance against radiation-induced faults. The proposed system utilizes nanoscale CMOS fabrication technology to achieve compact area utilization, faster switching speed, and efficient power management for advanced aerospace computing applications. By integrating fault-tolerant design techniques and optimized transistor arrangements, the memory cell provides improved operational stability in extreme environmental conditions. The proposed architecture is highly suitable for aerospace communication systems, avionics, satellite processing units, military electronics, and next-generation space exploration technologies requiring robust and energy-efficient semiconductor memory systems