Noise-Aware Design of Quantum Counters Using Qiskit and IBM Quantum Processors

Abstract

Quantum counters are very crucial elements in the design of quantum sequential circuits and quantum control systems. This article details the design, implementation, and noise-aware benchmarking of large-scale quantum counter designs based on the Qiskit framework and IBM Quantum computing platforms. The quantum counter architectures introduced are 2-bit, 3-bit, 4-bit, and 5-bit quantum counters which are developed using reversible quantum gates like Pauli-X, Controlled-NOT (CNOT), Toffoli, and Multi-Controlled X (MCX) gates. Firstly, all the counter architectures were confirmed to be working well in the ideal simulation scenario using the Qiskit Aer simulator where they achieved perfect computational fidelity and produced correct counting sequences. For the assessment of practical performance in the Noisy Intermediate-Scale Quantum (NISQ) environment, several quantum noise models, including bit-flip noise, depolarizing noise, amplitude damping noise, and phase damping noise, were introduced within the experimental framework. The experimental findings indicate that as circuits become more complex, the precision of computations decreases in the presence of real-world noise conditions. Under bit-flip noise, the correct counts noted changed from 846 for the 2-bit counter to 620 for the 5-bit counter. Likewise, depolarizing noise led to a slight decline, whereas amplitude damping noise resulted in the most drastic decrease in performance, dropping the correct counts from 253 in the 2-bit design to merely 33 in the 5-bit design. On the contrary, a phase damping noise showed almost no impact and retained 1024 correct counts across all architectures. The scalability analysis demonstrates that quantum counter architectures based on reversible gates can proficiently work over quite extensive qubit configurations while maintaining functional correctness. Nevertheless, the increase in circuit depth and gate complexity mainly results in susceptibility to decoherence and noise accumulation. This work offers a unified framework for the development and evaluation of large-scale quantum sequential circuits and sheds light on building quantum systems that can be used fault-tolerantly in future quantum computing implementations.