DESIGN AND IMPLEMENTATION OF A HYBRID RSA–DSA– SHA1 CRYPTOGRAPHIC PROCESSOR FOR SECURE DATA COMMUNICATION USING VERILOG HDL

Abstract

The rapid growth of digital communication networks, cloud computing platforms, Internet of Things (IoT) devices, and online financial services has significantly increased the demand for secure information exchange. Ensuring confidentiality, integrity, authentication, and nonrepudiation has become a critical requirement in modern communication systems. Traditional software-based cryptographic solutions often suffer from increased computational complexity, processing latency, and resource utilization, making them less suitable for real-time secure applications. This paper presents the design and implementation of a hardware-based hybrid cryptographic processor that integrates RSA encryption/decryption, Digital Signature Algorithm (DSA) signature generation and verification, and Secure Hash Algorithm-1 (SHA-1) hashing within a unified architecture. The proposed system is developed using Verilog HDL and employs Montgomery modular multiplication and modular exponentiation techniques to accelerate cryptographic computations while reducing hardware complexity. RSA provides confidentiality through public-key encryption and decryption, DSA ensures authentication and nonrepudiation through digital signatures, and SHA-1 generates message digests for integrity verification. The architecture operates in sender and receiver modes, enabling secure message transmission, digital signing, signature verification, encryption, and decryption within a single framework. Functional verification and simulation results demonstrate the correctness, reliability, and effectiveness of the proposed design. The integrated architecture offers improved security, efficient hardware utilization, reduced computational overhead, and suitability for FPGA and VLSI implementation in modern secure communication systems.