8T SRAM Cell Design for Dynamic and Leakage Power Reduction Technology

Authors

  • 1Kunchala UshaRani, 2Dr. G. Suresh Author

DOI:

https://doi.org/10.62643/

Abstract

Static Random Access Memory (SRAM) is a piece of genuine memory which is temperamental, speedier and power hungry. It draws in a ton of power connection with various pieces of a PC, which is the explanation reducing power usage of SRAM adds to the lessening of power use of for the most part system. Different circuit plan methods are introduced up until this point, to cut down the power usage. Primarily, In the proposed 8T SRAM Cell Using 22nm For Low Power Applications. The read action and make out of the proposed 8T SRAM cell is improved when diverged from Semi Adiabatic. In this cycle 8T SRAM Cell Using 22nm area and power usage.

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Published

10-06-2026

How to Cite

8T SRAM Cell Design for Dynamic and Leakage Power Reduction Technology. (2026). International Journal of Engineering Research and Science & Technology, 22(2), 3139-3143. https://doi.org/10.62643/