DESIGN AND ANALYSIS OF HIGH SPEED WALLACE TREE MULTIPLIER USING PARALLEL PREFIX ADDRESS FOR VLSI CIRCUIT DESIGN. int. J. Eng. Res. Sci. Tech. [Internet]. 2025 May 13 [cited 2026 Nov. 9];21(2):1681-96. Available from: https://ijerst.org/index.php/ijerst/article/view/922