Design and Implementation of a High-Speed 64-Bit Carry Look-Ahead Decimal Adder (CLDA) using Verilog HDL in Xilinx Vivado. International Journal of Engineering Research and Science & Technology, [S. l.], v. 22, n. 2(1), p. 2566–2572, 2026. DOI: 10.62643/. Disponível em: https://ijerst.org/index.php/ijerst/article/view/3165. Acesso em: 17 aug. 2026.