Design and Optimization of a Hybrid PTL-TGL 4:1 Multiplexer Using MTCMOS Power Gating for Ultra Low-Power VLSI Applications. International Journal of Engineering Research and Science & Technology, [S. l.], v. 22, n. 2(1), p. 2527–2533, 2026. DOI: 10.62643/. Disponível em: https://ijerst.org/index.php/ijerst/article/view/3155. Acesso em: 18 aug. 2026.